This invention is directed to improved semiconductor devices, and in particular is directed to highly conductive semiconductor structures, such as those formed of tungsten or tungsten silicide, with reduced topographic profiles, and electrical devices incorporating same.
Tungsten (W) or Tungsten silicide (WSi) have desirable conductive and other properties making them useful in forming semiconductor structures, especially bit-line gates. In the past, due to the lack of a sufficiently selective etch process, the process illustrated in FIGS. 1 and 2 was utilized. A layer of tungsten or tungsten silicide 101 was deposited over a layer of polysilicon 102 (also referred to as poly or polySi), which was previously deposited on the substrate 103. Substrate 103 could be an oxide, for example silicon oxide-silicon nitride-silicon oxide (also referred to as ONO), itself on a silicon substrate. The polysilicon layer 102 improved the etch process window during etching of the conductive layer, and also enhanced the adhesion of the W or WSi to the substrate.
With reference to FIG. 2 following etching, the resulting conductive structure consists of an upper conductive layer 101a and an intermediate xe2x80x9cadhesivexe2x80x9d layer 102a on top of substrate 103. If layer 101 a is formed of W, and the conductive structure forms a structure such as a bit-line gate, generally the W layer must have a thickness between about 800-2500 angstroms (xc3x85) to be sufficiently conductive to accomplish the desired function. Generally, the intermediate or adhesive layer 102a must be at least 1000 xc3x85 to achieve optimal etching. Generally, such previous structures have a thickness greater than about 3000 xc3x85.
However, the resulting structure of a conductive material on top of a polysilicon layer has a higher electrical resistance than desired due to the lower conductivity of the polysilicon with respect to the conductive layer, and further the structure is taller or thicker than desired, increasing the topography of the overall device, making any subsequent processing steps more difficult.
It is thus desired to have more highly conductive semiconductor structures. A highly conductive semiconductor structure is defined herein as a structure which has a conductive layer adhered to a substrate by an intermediate adhesive layer, wherein the adhesive layer is conductive but less conductive than the conductive layer, and the conductivity of the overall structure (i.e., the conductive layer and adhesive layer) is higher than previous conductive semiconductor structures formed of a conductive layer and an adhesive layer. In order to reduce electrical resistance, it is necessary to increase the thickness of the conductive layer and/or reduce the thickness of the adhesive layer. However, due to the deficiencies of prior art etch processes, it was not possible to decrease the thickness of the adhesive layer below about 1000 xc3x85, and increasing the thickness of the overlying conductive layer was undesirable as this would increase the topography (vertical profile), cost, and overall size of the resulting structure and devices incorporating same. In view of the need for smaller devices, it desirable to reduce the size and increase the conductivity (reduce electrical resistance) of semiconductor structures, and the resulting semiconductor devices and electrical devices incorporating same.
Therefore, there is a need for highly conductive semiconductor structures that have a lower profile with respect to the underlying substrate than previous structures. There is also a need for an improved process of making such structures.
In one aspect the present invention is directed to a low profile conductive structure on a semiconductor device that also has reduced electrical resistance with respect to previous structures designed to perform the same function. In one embodiment, the present invention is directed to a highly conductive semiconductor structure having a conductive layer of W or WSi and having a reduced topography or vertical profile with respect to prior semiconductor structures having a W or WSi conductive layer, yet having lower resistance than such prior structures. In a preferred embodiment of the present invention the conductive layer of the highly conductive structure is formed of W or WSi, and the intermediate layer or adhesive layer is of polysilicon, and the overall structure thickness (i.e., projecting out from the semiconductor substrate) is less than about 3000 xc3x85, yet the conductive structure is thick enough to accomplish the desired function. In alternative preferred embodiments, the overall structure thickness is less than about 2600 xc3x85 or less than about 2000 xc3x85, yet the structure is thick enough to accomplish the desired function. In a preferred embodiment the conductive layer is formed of W and has a thickness (i.e., vertically with respect to the underlying substrate) of approximately 2000 xc3x85xc2x1500 xc3x85. In a preferred embodiment the adhesive layer is conductive and at most about 100 xc3x85 thick, yet thick enough to provide firm adhesion of the conductive layer to the substrate, so that the resulting semiconductor structure will be robust enough to withstand subsequent processing to form a semiconductor device, installation in an electrical device, and use. In a preferred embodiment the adhesive layer has a thickness of between about 10 xc3x85 and about 100 xc3x85, and is formed of polysilicon.
In another aspect, the present invention is directed to a new method for forming low profile highly conductive semiconductor structures, and semiconductor devices and electrical devices incorporating same. In a preferred embodiment, a single damascene etch process is used, in which a sacrificial (or mold) layer is deposited on a substrate, patterned in the desired configuration, followed by deposit of a thin adhesive layer, subsequently followed by depositing of the highly conductive layer. Chemical mechanical polishing (CMP) or other techniques are used to remove excess adhesive and conductive layers as desired in between deposition steps. Thereafter, the balance of the sacrificial layer is removed to yield the final product. In a preferred embodiment, the adhesive layer is electrically conductive yet provides for good bonding between typical substrates and more conductive materials, such as W and WSi.
The highly conductive semiconductor structures and semiconductor devices incorporating them are utilized to construct electronic devices. The semiconductor structure of the present invention may be incorporated into a semiconductor device, such as an integrated circuit, for example a memory cell, such as an SRAM, a DRAM, an EPROM, an EEPROM, non-volatile memory device, etc.; a programmable logic device; a data communications device; a clock generation device; etc. Furthermore, any of these semiconductor devices may be incorporated in an electronic device (which term includes an electromechanical device) for example a computer, an airplane, a camera, a television, a mobile telephone, or an automobile.